About¶
Nafarr is developed using SpinalHDL, a hardware description language based on Scala that allows for high-level hardware design. SpinalHDL can generate Verilog or VHDL files, enabling the use of existing tools and infrastructure while benefiting from the advanced features SpinalHDL offers. The project is organized with two key directories in the root: hardware/, which contains the SpinalHDL code for hardware design, and software/, which holds the software components that interact with or test the hardware.
Hardware¶
This directory contains all IP cores implemented as Scala modules. They are located under hardware/scala/nafarr and organized as follows.
Directory |
Purpose |
|---|---|
blackboxes |
Has blackbox wrapper for different FPGA architectures or PDKs |
memory |
External memory interfaces or internal memory blocks |
multimedia |
Converter, pipelines, etc. to stream media content |
peripherals |
Interfaces to external peripherals |
system |
System components to manage the architecture |
Software¶
IP cores may require software to function correctly. This directory includes simple bare-metal drivers, hardware testing software, or firmware.
Drivers for the Zephyr RTOS are available in elements-zephyr-application.
Status¶
The following table lists all available IP cores and their status.
Name |
package |
Status |
Link |
|---|---|---|---|
Gpio |
nafarr.peripherals.io |
OK |
|
Pio |
nafarr.peripherals.io |
OK |
|
Pwm |
nafarr.peripherals.io |
OK |
|
Uart |
nafarr.peripherals.com |
OK |