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Nafarr 0.1.0 documentation
Nafarr 0.1.0 documentation
  • About
  • Getting Started
  • Export Verilog/VHDL
  • IP Cores
    • Peripherals
      • General-Purpose I/O (GPIO)
      • Pin Multiplexer (Pinmux)
      • Programmable I/O (PIO)
      • Pulse-Width Modulation (PWM)
      • General-Purpose Timer
      • Universal Asynchronous Receiver-Transmitter (UART)
      • Inter-Integrated Circuit (I2C) Device
      • Inter-Integrated Circuit (I2C) Controller
    • System
      • Clock Controller
      • Hardware Mailbox
      • Reset Controller
      • Hardware Semaphore
      • Error Signaling Module (ESM)
      • System Controller (Syscon)
      • Hardware Watchdog Timer (WDT)
    • Memory
      • HyperBus Memory Controller (HyperBus)
      • SPI Execute-In-Place Flash Controller (SPI XIP)
      • On-Chip RAM (OCRAM)
    • Crypto
      • CRC32 Accelerator
      • Pseudo-Random Number Generator (PRNG)
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MemoryΒΆ

The following list offers an overview of all available memory controller IP cores.

  • HyperBus Memory Controller (HyperBus)
  • SPI Execute-In-Place Flash Controller (SPI XIP)
  • On-Chip RAM (OCRAM)
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HyperBus Memory Controller (HyperBus)
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Hardware Watchdog Timer (WDT)
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