System Controller (Syscon)¶
The System Controller provides a read-only identification and configuration register block. Software can query compile-time SoC parameters at runtime: vendor, platform, product, silicon revision, feature flags, reference clock frequency, and build timestamp.
All registers are constants derived from elaboration-time Parameter values.
No write access is defined; bus writes are silently ignored.
Features¶
IP Identification block (header + version at 0x000-0x007)
32-bit identity register: vendor, platform, product, and platform class
Silicon revision register: major and minor revision
UNIX build timestamp register (seconds since epoch)
Reference clock frequency register (Hz)
Feature flag words: bit N set when the
Featureelement with ordinal N is presentSupported buses: APB3, TileLink, Wishbone
Parameters¶
Parameter |
Default |
Description |
|---|---|---|
|
(required) |
Vendor identifier ( |
|
(required) |
Platform identifier ( |
|
(required) |
Platform class ( |
|
(required) |
Product identifier ( |
|
(required) |
Board reference oscillator frequency in Hz |
|
|
Silicon major revision |
|
|
Silicon minor revision |
|
|
Feature flags to set in the features register |
|
env |
UNIX timestamp (seconds). Read from the |
Register Map¶
Offset |
Name |
Description |
|---|---|---|
0x000 |
|
IP Identification header (API, length, IP ID) |
0x004 |
|
IP Identification version (major, minor, patch) |
0x008 |
|
SoC identity (see below) |
0x00C |
|
Silicon revision: major in [31:16], minor in [15:0] |
0x010 |
|
Build UNIX timestamp (seconds) |
0x014 |
|
Reference oscillator frequency (Hz) |
0x018 |
|
Number of feature words in [7:0] |
0x01C |
|
Feature words, one per 32 |
Identity Register (0x008)¶
Bits |
Field |
Description |
|---|---|---|
[31:24] |
|
Platform class ordinal (0=NonMetal/MCU, 1=Alkali/MPU) |
[23:16] |
|
Product ordinal (0=ElemRV) |
[15:8] |
|
Platform ordinal (0=Hydrogen, 1=Carbon, 2=Nitrogen, 3=Oxygen, 4=Phosphorus, 5=Sulfur) |
[7:0] |
|
Vendor ordinal (0=AescSilicon) |
Feature Words (0x01C)¶
features[N / 32] bit N % 32 is set when the Feature element with
ordinal N appears in the features parameter list. The SoC builder populates
this list automatically by collecting sysconFeatures from each IP on the
bus.
Bit |
Feature |
Description |
|---|---|---|
0 |
|
I2C controller or device present |
1 |
|
SPI controller or device present |
2 |
|
UART present |
3 |
|
GPIO present |
4 |
|
Programmable I/O present |
5 |
|
PWM present |
6 |
|
Pin multiplexer present |
7 |
|
Clock controller present |
8 |
|
Error Signaling Module present |
9 |
|
Mailbox present |
10 |
|
Machine-mode timer present |
11 |
|
General-purpose timer present |
12 |
|
Platform-level interrupt controller present |
13 |
|
Reset controller present |
14 |
|
Hardware semaphore present |
15 |
|
Watchdog timer present |
16 |
|
AES accelerator present |
17 |
|
CRC engine present |
18 |
|
Pseudo-random number generator present |
19 |
|
HyperBus interface present |
20 |
|
On-chip SRAM controller present |
21 |
|
SPI flash controller present |
22 |
|
DMA controller present |
Software¶
The bare-metal driver is software/driver/syscon.c with software/include/syscon.h. The
register block and all ordinals are in software/include/syscon_defs.h, which is generated
from the Scala sources: after changing the register map or an enum in SocIds.scala, run
sbt "runMain nafarr.GenerateHeaders"
and commit the updated header. CI fails if the committed header differs from the generated one.